# This is a BitKeeper generated patch for the following project:
# Project Name: Linux 2.4
# This patch format is intended for GNU patch command version 2.5 or higher.
# This patch includes the following deltas:
#	           ChangeSet	1.130   -> 1.131  
#	arch/ppc/configs/menf1_defconfig	1.1     -> 1.2    
#	arch/ppc/kernel/menf1_pci.c	1.1     -> 1.2    
#	arch/ppc/kernel/Makefile	1.28    -> 1.29   
#	arch/ppc/kernel/menf1.h	1.1     -> 1.2    
#	arch/ppc/kernel/open_pic.c	1.23    -> 1.24   
#	arch/ppc/kernel/menf1_setup.c	1.1     -> 1.2    
#
# The following is the BitKeeper ChangeSet Log
# --------------------------------------------
# 01/06/07	trini@opus.bloom.county	1.131
# Update MEN F1.
# --------------------------------------------
#
diff -Nru a/arch/ppc/configs/menf1_defconfig b/arch/ppc/configs/menf1_defconfig
--- a/arch/ppc/configs/menf1_defconfig	Thu Jun  7 12:27:09 2001
+++ b/arch/ppc/configs/menf1_defconfig	Thu Jun  7 12:27:09 2001
@@ -30,15 +30,20 @@
 # CONFIG_ALL_PPC is not set
 # CONFIG_APUS is not set
 # CONFIG_SPRUCE is not set
+# CONFIG_PCORE is not set
 CONFIG_MENF1=y
 # CONFIG_MCPN765 is not set
 # CONFIG_MVME5100 is not set
 # CONFIG_PRPMC750 is not set
+# CONFIG_SANDPOINT is not set
 # CONFIG_K2 is not set
 # CONFIG_GEMINI is not set
+# CONFIG_ZX4500 is not set
+# CONFIG_MPC10X_STORE_GATHERING is not set
 # CONFIG_PPC601_SYNC_FIX is not set
 # CONFIG_SMP is not set
 # CONFIG_ALTIVEC is not set
+# CONFIG_TAU is not set
 
 #
 # General setup
@@ -66,7 +71,8 @@
 #
 # CONFIG_PARPORT is not set
 CONFIG_PPC_RTC=y
-# CONFIG_CMDLINE_BOOL is not set
+CONFIG_CMDLINE_BOOL=y
+CONFIG_CMDLINE="ip=on"
 
 #
 # Memory Technology Devices (MTD)
@@ -90,8 +96,9 @@
 # CONFIG_BLK_DEV_DAC960 is not set
 # CONFIG_BLK_DEV_LOOP is not set
 # CONFIG_BLK_DEV_NBD is not set
-# CONFIG_BLK_DEV_RAM is not set
-# CONFIG_BLK_DEV_INITRD is not set
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_SIZE=4096
+CONFIG_BLK_DEV_INITRD=y
 
 #
 # Multi-device support (RAID and LVM)
@@ -120,7 +127,8 @@
 CONFIG_IP_MULTICAST=y
 # CONFIG_IP_ADVANCED_ROUTER is not set
 CONFIG_IP_PNP=y
-CONFIG_IP_PNP_BOOTP=y
+CONFIG_IP_PNP_DHCP=y
+# CONFIG_IP_PNP_BOOTP is not set
 # CONFIG_IP_PNP_RARP is not set
 # CONFIG_NET_IPIP is not set
 # CONFIG_NET_IPGRE is not set
@@ -312,6 +320,7 @@
 # CONFIG_EEPRO100 is not set
 # CONFIG_EEPRO100_PM is not set
 # CONFIG_LNE390 is not set
+# CONFIG_FEALNX is not set
 # CONFIG_NATSEMI is not set
 # CONFIG_NE2K_PCI is not set
 # CONFIG_NE3210 is not set
@@ -478,6 +487,7 @@
 CONFIG_ISO9660_FS=y
 # CONFIG_JOLIET is not set
 # CONFIG_MINIX_FS is not set
+# CONFIG_VXFS_FS is not set
 # CONFIG_NTFS_FS is not set
 # CONFIG_NTFS_RW is not set
 # CONFIG_HPFS_FS is not set
diff -Nru a/arch/ppc/kernel/Makefile b/arch/ppc/kernel/Makefile
--- a/arch/ppc/kernel/Makefile	Thu Jun  7 12:27:09 2001
+++ b/arch/ppc/kernel/Makefile	Thu Jun  7 12:27:09 2001
@@ -80,8 +80,8 @@
 					indirect_pci.o pci_auto.o open_pic.o \
 					i8259.o pplus_common.o
 obj-$(CONFIG_MENF1)		+= menf1_setup.o menf1_pci.o todc_time.o \
-					i8259.o mpc10x_common.o pci_auto.o \
-					indirect_pci.o
+					i8259.o mpc10x_common.o open_pic.o \
+					pci_auto.o indirect_pci.o
 obj-$(CONFIG_MVME5100)		+= mvme5100_setup.o mvme5100_pci.o open_pic.o \
 					todc_time.o indirect_pci.o i8259.o \
 					pplus_common.o
diff -Nru a/arch/ppc/kernel/menf1.h b/arch/ppc/kernel/menf1.h
--- a/arch/ppc/kernel/menf1.h	Thu Jun  7 12:27:09 2001
+++ b/arch/ppc/kernel/menf1.h	Thu Jun  7 12:27:09 2001
@@ -23,4 +23,6 @@
 #define	MENF1_IDE0_BASE_ADDR		0x1f0
 #define MENF1_IDE1_BASE_ADDR		0x170
 
+#define MENF1_8259_IRQ			16
+
 #endif /* _PPC_KERNEL_MENF1_H */
diff -Nru a/arch/ppc/kernel/menf1_pci.c b/arch/ppc/kernel/menf1_pci.c
--- a/arch/ppc/kernel/menf1_pci.c	Thu Jun  7 12:27:09 2001
+++ b/arch/ppc/kernel/menf1_pci.c	Thu Jun  7 12:27:09 2001
@@ -69,19 +69,10 @@
 			MPC10X_MEM_MAP_A,
 			MPC10X_MEM_MAP_B,
 			MPC10X_MAPB_EUMB_BASE);
+
+	hose->mem_resources[0].end = 0xffffffff;
 	
 	hose->last_busno = pciauto_bus_scan(hose, hose->first_busno);
-
-#if 1
-	{
-		/* Add ISA bus wait states */
-		unsigned char isa_control;
-
-		early_read_config_byte(hose, 0, 0x90, 0x43, &isa_control);
-		isa_control |= 0x33;
-		early_write_config_byte(hose, 0, 0x90, 0x43, isa_control);
-	}
-#endif
 
 	ppc_md.pci_swizzle = common_swizzle;
 	ppc_md.pci_map_irq = menf1_map_irq;
diff -Nru a/arch/ppc/kernel/menf1_setup.c b/arch/ppc/kernel/menf1_setup.c
--- a/arch/ppc/kernel/menf1_setup.c	Thu Jun  7 12:27:09 2001
+++ b/arch/ppc/kernel/menf1_setup.c	Thu Jun  7 12:27:09 2001
@@ -37,6 +37,7 @@
 #include <asm/time.h>
 
 #include "local_irq.h"
+#include "open_pic.h"
 #include "i8259.h"
 #include "mpc10x.h"
 #include "todc.h"
@@ -44,9 +45,38 @@
 
 extern void menf1_find_bridges(void);
 extern unsigned long loops_per_jiffy;
+extern char cmd_line[];
 
-/* Dummy variable to satisfy mpc10x_common.o */
-void *OpenPIC_Addr;
+/*
+ * In order to utilize all of the available EPIC sources
+ * it is necessary to overload the initsenses past the
+ * max number of sources that the EPIC will report as
+ * useful.  The entries commented as "reserved" are
+ * padding so that later active sources have the proper
+ * offsets to their registers in the OpenPIC code.
+ */
+static u_char menf1_openpic_initsenses[] __initdata = {
+			/* 0-15 used by 8259 */
+	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	0,		/* 16: EPIC IRQ 0: 8259 cascade */
+	0,		/* 17: EPIC IRQ 1: unused */
+	0,		/* 18: EPIC IRQ 2: unused */
+	0,		/* 19: EPIC IRQ 3: unused */
+	0,		/* 20: EPIC IRQ 4: unused */
+			/* 21-128: reserved */
+	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	0,		/* 129: I2C controller */
+	0,		/* 130: DMA controller channel 0 */
+	0,		/* 131: DMA controller channel 1 */
+	0, 0,		/* 132-133: reserved */
+	0		/* 134: I2O message unit */
+};
 
 int
 menf1_get_cpuinfo(char *buffer)
@@ -66,11 +96,16 @@
 	
 	/* Lookup PCI host bridges */
 	menf1_find_bridges();
-	
+
+#ifdef CONFIG_BLK_DEV_INITRD
+	if (initrd_start)
+		ROOT_DEV = MKDEV(RAMDISK_MAJOR, 0); /* /dev/ram */
+	else
+#endif
 #ifdef CONFIG_ROOT_NFS
-	ROOT_DEV = to_kdev_t(0x00ff); /* /dev/nfs pseudo device */
+		ROOT_DEV = to_kdev_t(0x00ff); /* /dev/nfs pseudo device */
 #else
-	ROOT_DEV = to_kdev_t(0x0302); /* /dev/hda2 */
+		ROOT_DEV = to_kdev_t(0x0302); /* /dev/hda2 */
 #endif
 	
 	printk("MEN F1 port (C) 2001 MontaVista Software, Inc. (source@mvista.com)\n");
@@ -112,14 +147,53 @@
 {
 	int i;
 
+	OpenPIC_InitSenses = menf1_openpic_initsenses;
+	OpenPIC_NumInitSenses = sizeof(menf1_openpic_initsenses);
+
+	openpic_init(1, 0, NULL, -1);
+
 	for ( i = 0 ; i < NUM_8259_INTERRUPTS  ; i++ )
 		irq_desc[i].handler = &i8259_pic;
+
+	if (request_irq(MENF1_8259_IRQ, no_action, SA_INTERRUPT,
+			"8259 cascade to EPIC", NULL)) {
+		 printk("Unable to get EPIC IRQ %d for cascade\n",
+				 MENF1_8259_IRQ);
+	}
+
 	i8259_init();
 }
 
-int menf1_get_irq(struct pt_regs *regs)
+static int
+menf1_get_irq(struct pt_regs *regs)
 {
-	return i8259_irq(0);
+        int irq, cascade_irq;
+
+	irq = openpic_irq();
+
+	if (irq == MENF1_8259_IRQ) {
+		cascade_irq = i8259_irq(smp_processor_id());
+
+		if (cascade_irq != -1) {
+			irq = cascade_irq;
+			openpic_eoi();
+		}
+	}
+	else if (irq == OPENPIC_VEC_SPURIOUS) {
+		irq = -1;
+	}
+
+	return irq;
+}
+
+static void
+menf1_post_irq(struct pt_regs* regs, int irq)
+{
+	if (irq >= NUM_8259_INTERRUPTS) {
+		openpic_eoi(); /* Issue EOI to EPIC */
+	}
+
+	return;
 }
 
 /*
@@ -241,6 +315,15 @@
 menf1_init(unsigned long r3, unsigned long r4, unsigned long r5,
 	  unsigned long r6, unsigned long r7)
 {
+
+#ifdef CONFIG_BLK_DEV_INITRD
+	if (r4)
+	{
+		initrd_start = r4 + KERNELBASE;
+		initrd_end = r5 + KERNELBASE;
+	}
+#endif
+
 	/* Copy cmd_line parameters */
 	if (r6 && (((char *) r6) != '\0'))
 	{
@@ -262,6 +345,7 @@
 	ppc_md.get_cpuinfo	= menf1_get_cpuinfo;
 	ppc_md.init_IRQ		= menf1_init_IRQ;
 	ppc_md.get_irq		= menf1_get_irq;
+	ppc_md.post_irq		= menf1_post_irq;
 
 	ppc_md.find_end_of_memory = menf1_find_end_of_memory;
 	
diff -Nru a/arch/ppc/kernel/open_pic.c b/arch/ppc/kernel/open_pic.c
--- a/arch/ppc/kernel/open_pic.c	Thu Jun  7 12:27:09 2001
+++ b/arch/ppc/kernel/open_pic.c	Thu Jun  7 12:27:09 2001
@@ -294,6 +294,15 @@
 			 OPENPIC_FEATURE_LAST_PROCESSOR_SHIFT) + 1;
 	NumSources = ((t & OPENPIC_FEATURE_LAST_SOURCE_MASK) >>
 		      OPENPIC_FEATURE_LAST_SOURCE_SHIFT) + 1;
+	/*
+	 * If OpenPIC_NumInitSenses has been loaded up with a number
+	 * of sources that is greater than NumSources then NumSources
+	 * is set equal to OpenPIC_NumInitSenses.  This is necessary
+	 * for an EPIC since its active OpenPIC sources are not found
+	 * contiguously. 
+	 */
+	if (OpenPIC_NumInitSenses > NumSources)
+		NumSources = OpenPIC_NumInitSenses;
 	printk("OpenPIC Version %s (%d CPUs and %d IRQ sources) at %p\n",
 	       version, NumProcessors, NumSources, OpenPIC);
 	timerfreq = openpic_read(&OpenPIC->Global.Timer_Frequency);